zeitgeist
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zeitgeist [2018/03/13 20:15] greg |
zeitgeist [2018/03/13 21:34] (current) greg |
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| I noticed a small error on the schematic diagram. It has C9 - pin 9 on the delay chip - as 9100nF. Looking at the overlay and photo here it appears that the extra 9 is a typo, it should probably be 100nF. | I noticed a small error on the schematic diagram. It has C9 - pin 9 on the delay chip - as 9100nF. Looking at the overlay and photo here it appears that the extra 9 is a typo, it should probably be 100nF. | ||
zeitgeist.1520997312.txt.gz ยท Last modified: 2018/03/13 20:15 by greg
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